ListarArtículos por tema "Architecture"

Mostrando ítems 1-2 de 2

    • A compact functional verification flow for a RISC-V 321 based core 

      Molina Robles, Roberto; Solera Bolanos, Edgar; García Ramírez, Ronny; Chacón Rodríguez, Alfonso; Rimolo Donadio, Renato; Arnaud Maceira, Alfredo (IEEE, 2020)
      The structure of a functional verification flow used for the design of a RISC-V core is presented. The paper offers a guide on the test-planning used and details of the flow architecture, showing how to integrate the ...

    • An affordable post-silicon testing framework applied to a RISC-V based microcontroller 

      Molina Robles, Roberto; García Ramírez, Ronny; Chacón Rodríguez, Alfonso; Rimolo Donadio, Renato; Arnaud Maceira, Alfredo (IEEE, 2021-04)
      The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in ...