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dc.rights.licenseLicencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0)
dc.contributor.authorGak Szollosy, Joel
dc.contributor.authorArnaud Maceira, Alfredo
dc.contributor.authorMiguez de Mori, Matías Rafael
dc.date.accessioned2021-10-21T21:21:20Z
dc.date.available2021-10-21T21:21:20Z
dc.date.issued2021
dc.identifier.urihttps://hdl.handle.net/10895/1553
dc.description.abstractA design methodology for level shifters voltage translators, where the output voltage ranges from 0 to 18 V, and the input voltage ranges from 2 to 5.5 V in a 0.6 lm CMOS-HV technology, is presented. This family of circuits have a special interest in the case of implantable medical devices where is common to handle previously unknown voltages either positive or negative, above or below the control logic supply VDD. Two application examples are presented: a composite switch to control negative stimuli voltage pulses, and a multi-channel programmable charge-pump voltage multiplier, aimed at charging the output capacitors of an IMD.es
dc.description.sponsorshipAgencia Nacional de Investigación e Innovación
dc.format.mimetypeapplication/pdf
dc.language.isoenes
dc.publisherSpringeres
dc.relation.ispartofAnalog Integrated Circuits and Signal Processing, Vol.3, No. 107, pp. 617–628, 2021.
dc.subjectLevel shifteres
dc.subjectHV-CMOSes
dc.subjectBiomedical circuitses
dc.titleCMOS level shifters from 0 to 18 V outputes
dc.typeArtículoes


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